1. Field of the Invention
This invention is directed to the architecture of a data bus, in general, and to a high speed data bus which is shared by a plurality of users, in particular.
2. Prior Art
In order to maximize the utilization of computer systems, it is frequently desirable to interface with and between a plurality of user systems. These users can be in the form of active users, i.e., those which initiate commands, or passive users, i.e., those which operate in response to commands. Of course, some of the users can operate in either of the modes when properly addressed. However, in the past it has been frequently required that the active user make a request to the system, i.e., through a control bus, the passive user, the CPU or the like, in order to initiate any operation or function. However, if one or more of the other units involved were "busy", the initiating active unit would be required to (a) re-address the system while waiting for access thereto or (b) proceed with another activity while keeping track of the activity which had been truncated because of the "busy" condition.
In the past, this has caused significant delays in the system operation. Inasmuch as the system is generally only as effective as its slowest operation or unit, the throughputs of prior systems were somewhat reduced. Moreover, the complexity of existing systems is increased because of the greater overhead requirements or the increased bookkeeping requirements which are involved in system operation.
In addition, in most of the known systems, the data which is to be transferred is handled by the same bus which includes command signals. Consequently, the command signals and the data signals are interleaved or intertwined. With this commingling of signals, the data transfer operation is negatively impacted. As well, the command operation can be seriously delayed when a significant block of data is being transferred along the common bus.